A novel circuit for a simple non motion-compensated deinterlacer is presented, where a motion detection module effectively computes a weighted mean of a temporal and a spatial interpolator. Both the motion detection module and the two interpolators are innovative, simple and effective, so that they are able to provide very good results, as experimental results show, at a low computational complexity. The final circuit, based on a pipeline architecture, has been designed to work on a real time video digital signal with a low power consumption.

Design and implementation of a high-quality, low-power deinterlacer circuit

MARSI, STEFANO;CARRATO, SERGIO
2002-01-01

Abstract

A novel circuit for a simple non motion-compensated deinterlacer is presented, where a motion detection module effectively computes a weighted mean of a temporal and a spatial interpolator. Both the motion detection module and the two interpolators are innovative, simple and effective, so that they are able to provide very good results, as experimental results show, at a low computational complexity. The final circuit, based on a pipeline architecture, has been designed to work on a real time video digital signal with a low power consumption.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11368/2297207
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