DESIGN AND IMPLEMENTATION OF AN FPGA-BASED DIGITAL PROCESSOR FOR BPM APPLICATIONS

Digital processing systems have been proven to often outperform analog elaboration. Indeed, thanks to high-density DSPs and FPGAs, operations in digital domain give results that are impossible to achieve in other ways. On the other side, dealing with this great performance and fl exibility is not always straightforward: the processing chain needs to be accurately planned to reach the desired goals, avoiding erratic behaviours in the digital domain. In this paper, we focus on the design and implementation of an FPGA-based digital processor that will be used in the electron beam position monitors of Elettra 2.0. After digitizing the 500 MHz beam signals from the pickups, the system executes a digital down conversion, followed by several fi ltering and demodulating stages, in order to have a selectable data rate that is suitable for both diagnostics and feedback. The position calculation is also performed in FPGA as well, with the well-known difference-over-sum algorithm. According to results provided by a fi xed-point simulation, the overall system has been implemented in an Intel Arria 10 FPGA, demonstrating the correct design functionality that meets the specifi ed requirements.