A prominent feature of photovoltaic devices is their ability to drive photo-generated charges to pathways of asymmetrical conductivity, guiding them to the corresponding electrodes. Under this guideline, the crystalline silicon (c-Si) solar cells dominate the photovoltaic (PV) market for decades and several optoelectronic losses and technological limitations are gradually emerging by now. To circumvent these issues, here, we replaced the doped-silicon emitter layer with a gradient copper-doped nickel oxide (Gd-NiOx), and incorporated a silicon oxide passivation (SOP) layer at the Gd-NiOx/c-Si interface, to construct the novel c-Si PV devices. Interestingly, it was observed that the Gd-NiOx hole selective layer can strengthen the built-in field by minimizing the front electrode/hole-selective layer barrier width and the SOP can reduce interface recombination simultaneously, thereby yielding a remarkable 20.3% efficiency for the proof-of-concept device. We believe the design proposed in this may be of interest for applications in PVs and other optoelectronic devices.
Gradient doped nickel oxide hole selective heterocontact and ultrathin passivation for silicon photovoltaics with efficiencies beyond 20%
Rosei, Federico
2022-01-01
Abstract
A prominent feature of photovoltaic devices is their ability to drive photo-generated charges to pathways of asymmetrical conductivity, guiding them to the corresponding electrodes. Under this guideline, the crystalline silicon (c-Si) solar cells dominate the photovoltaic (PV) market for decades and several optoelectronic losses and technological limitations are gradually emerging by now. To circumvent these issues, here, we replaced the doped-silicon emitter layer with a gradient copper-doped nickel oxide (Gd-NiOx), and incorporated a silicon oxide passivation (SOP) layer at the Gd-NiOx/c-Si interface, to construct the novel c-Si PV devices. Interestingly, it was observed that the Gd-NiOx hole selective layer can strengthen the built-in field by minimizing the front electrode/hole-selective layer barrier width and the SOP can reduce interface recombination simultaneously, thereby yielding a remarkable 20.3% efficiency for the proof-of-concept device. We believe the design proposed in this may be of interest for applications in PVs and other optoelectronic devices.File | Dimensione | Formato | |
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