The upgrade of the MALTA DMAPS designed in Tower 180 nm CMOS Imaging process will implement the numerous modifications, as well as front-end changes in order to boost the charge collection efficiency after the targeted fluence of 1x10151MeVneq/cm2. The effectiveness of these changes have been demonstrated in recent measurements with a small-scale Mini-MALTA demonstrator chip. Multiple changes in the digital periphery are proposed: The asynchronous address generator will be revised to provide more control over the pulse length. The Synchronization memory will be upgraded with the goal of achieving a sub-nanosecond timing resolution. Serial chip to chip data transfer will be prototyped, in order to gauge the plausibility of implementation on a future full sized chip. Apart from these changes, research of the overall sensor architecture will be discussed as well.
MALTA3: Concepts for a new radiation tolerant sensor in the TowerJazz 180 nm technology / Dobrijević, Dominik; Allport, Phil; Asensi, Ignacio; Berlea, Dumitru-Vlad; Bortoletto, Daniela; Buttar, Craig; Dachs, Florian; Dao, Valerio; Denizli, Haluk; A, Leyre Flores; Gabrielli, Andrea; Gonella, Laura; González, Vicente; Leblanc, Matt; Vázquez Núñez, Marcos; Oyulmaz, Kaan; Pernegger, Heinz; Piro, Francesco; Riedler, Petra; Sandaker, Heidi; Solans Sánchez, Carlos; Snoeys, Walter; Suligoj, Tomislav; van Rijnbach, Milou; Weick, Julian; Worm, Steven. - In: NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT. - ISSN 0168-9002. - 1040:(2022), pp. 167226.1-167226.3. [10.1016/j.nima.2022.167226]
MALTA3: Concepts for a new radiation tolerant sensor in the TowerJazz 180 nm technology
Laura Gonella;
2022-01-01
Abstract
The upgrade of the MALTA DMAPS designed in Tower 180 nm CMOS Imaging process will implement the numerous modifications, as well as front-end changes in order to boost the charge collection efficiency after the targeted fluence of 1x10151MeVneq/cm2. The effectiveness of these changes have been demonstrated in recent measurements with a small-scale Mini-MALTA demonstrator chip. Multiple changes in the digital periphery are proposed: The asynchronous address generator will be revised to provide more control over the pulse length. The Synchronization memory will be upgraded with the goal of achieving a sub-nanosecond timing resolution. Serial chip to chip data transfer will be prototyped, in order to gauge the plausibility of implementation on a future full sized chip. Apart from these changes, research of the overall sensor architecture will be discussed as well.| File | Dimensione | Formato | |
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