A compact physics-guided neural network for real-time pile-up rejection (PUR) in nuclear radiation spectroscopy is presented. The proposed dual-head architecture processes raw digitized waveforms and jointly predicts the global pile-up (PU) probability and the presence of a resolvable second peak, enabling reliable discrimination among single events, unresolvable PU, and resolvable PU. Fixed-point quantization and structured channel-wise pruning reduce parameters and arithmetic operations by 4.7× with minimal loss in classification performance relative to the floating-point baseline. The model is synthesized with hls4mland deployed on a Xilinx Zynq-7000 SoC-field-programmable gate array (FPGA), achieving fully deterministic inference at 50 MHz with approximately 87% resource utilization. Measurements with 22Na, 137Cs, and 60Co sources demonstrate stable real-time discrimination and robust generalization, including correct identification of saturated or out-of-range pulses. These results establish compressed physics-guided neural networks as an efficient and interpretable solution for embedded PUR in high-count-rate spectrometric front-end electronics.

Physics-Guided Neural Network for Pile-Up Rejection on SoC-FPGAs / Molina, R.S., Ballina, M.G., Crespo, M.L., Carrato, S.. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - 73:5(2026), pp. 2033-2044. [10.1109/TNS.2026.3681873]

Physics-Guided Neural Network for Pile-Up Rejection on SoC-FPGAs

Molina R. S.
Primo
Writing – Original Draft Preparation
;
Ballina M. G.
Secondo
Writing – Original Draft Preparation
;
Carrato S.
Ultimo
Supervision
2026-01-01

Abstract

A compact physics-guided neural network for real-time pile-up rejection (PUR) in nuclear radiation spectroscopy is presented. The proposed dual-head architecture processes raw digitized waveforms and jointly predicts the global pile-up (PU) probability and the presence of a resolvable second peak, enabling reliable discrimination among single events, unresolvable PU, and resolvable PU. Fixed-point quantization and structured channel-wise pruning reduce parameters and arithmetic operations by 4.7× with minimal loss in classification performance relative to the floating-point baseline. The model is synthesized with hls4mland deployed on a Xilinx Zynq-7000 SoC-field-programmable gate array (FPGA), achieving fully deterministic inference at 50 MHz with approximately 87% resource utilization. Measurements with 22Na, 137Cs, and 60Co sources demonstrate stable real-time discrimination and robust generalization, including correct identification of saturated or out-of-range pulses. These results establish compressed physics-guided neural networks as an efficient and interpretable solution for embedded PUR in high-count-rate spectrometric front-end electronics.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11368/3138258
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