This brief presents an application-specific instruc-tion-set processor (ASIP) for real-time Retinex image and videofiltering. Design optimizations are addressed at algorithmic andarchitectural levels, the latter including a dedicated memorystructure, an adapted pipeline, bypasses, a custom address gen-erator and special looping structures. Synthesized in CMOStechnology, the ASIP stands for its better energy-flexibilitytradeoff versus reference ASIC and digital signal processingRetinex implementations
Application-specific instruction-set processor for retinex-like image and video processing
Marsi S.;Ramponi G.;
2007-01-01
Abstract
This brief presents an application-specific instruc-tion-set processor (ASIP) for real-time Retinex image and videofiltering. Design optimizations are addressed at algorithmic andarchitectural levels, the latter including a dedicated memorystructure, an adapted pipeline, bypasses, a custom address gen-erator and special looping structures. Synthesized in CMOStechnology, the ASIP stands for its better energy-flexibilitytradeoff versus reference ASIC and digital signal processingRetinex implementationsFile in questo prodotto:
Non ci sono file associati a questo prodotto.
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
