We present a high-resolution 3-D (X,Y,t) imager for time-resolved experiments based on time-to-space conversion. The system uses cross delay line (CDL) detectors for particle identification and a fully configurable digital processor based on field programmable gate arrays (FPGAs) for 3-D image reconstruction. The instrument reaches a spatial resolution of 45 mu m full width at half maximum (FWHM) (i.e., 18 mu m rms) and a temporal precision of 15 ps rms. The detection rate achieved is 10 Mcps, with a dead time below 7 ns, leading to a global throughput up to 6 Gb/s. In addition to the state-of-the-art performance, the innovative aspect of the presented contribution resides in the complete reconfigurability of the instrument: it is, in fact, the first time that the time-to-digital converter (TDC) used for the time-to-space conversion has been fully implemented in programmable logic (PL), without the use of dedicated application-specific integrated circuit (ASIC) components. This advancement allows to adapt the instrument to the experimental setup without undergoing impractical hardware modifications.

High-Resolution Imager Based on Time-to-Space Conversion

Marco Cautero;Gabriele Brajnik;Giuseppe Cautero;Sergio Carrato;
2022-01-01

Abstract

We present a high-resolution 3-D (X,Y,t) imager for time-resolved experiments based on time-to-space conversion. The system uses cross delay line (CDL) detectors for particle identification and a fully configurable digital processor based on field programmable gate arrays (FPGAs) for 3-D image reconstruction. The instrument reaches a spatial resolution of 45 mu m full width at half maximum (FWHM) (i.e., 18 mu m rms) and a temporal precision of 15 ps rms. The detection rate achieved is 10 Mcps, with a dead time below 7 ns, leading to a global throughput up to 6 Gb/s. In addition to the state-of-the-art performance, the innovative aspect of the presented contribution resides in the complete reconfigurability of the instrument: it is, in fact, the first time that the time-to-digital converter (TDC) used for the time-to-space conversion has been fully implemented in programmable logic (PL), without the use of dedicated application-specific integrated circuit (ASIC) components. This advancement allows to adapt the instrument to the experimental setup without undergoing impractical hardware modifications.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11368/3051118
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